The present invention relates to monolithic solid state devices and in particular to a method of making Charge Coupled Devices (CCDs) using standard Complementary Metal Oxide Semiconductor (CMOS) processes.
CCD devices, as now quite commonly employed as image sensors in digital cameras and the like, consist of an array of elements for moving packets of electronic charge. Each element includes one or more gates fabricated typically by depositing multiple polycrystalline silicon (hereafter referred to as polysilicon) layers over one or more dielectric layers. However, the fabrication processes used for most CCDs are customized to optimize imaging CCDs, and are thus relatively expensive. Also, standard CCD processes do not generally allow fabrication of CMOS circuits.
Emerging CCD fabrication techniques that use only a single polysilicon layer are particularly attractive. As will be taught here, these approaches can be made compatible with standard Complementary Metal Oxide Semiconductor (CMOS) manufacturing technologies, making the integration of CCDs and CMOS circuits on the same chip much easier. The advantages of fabricating a CCD device with only a single polysilicon layer have been previously recognized by others, such as in the article by Okada, Y. “Core Performance of FT-/CCD Image Sensor with Single Layer of Poly-Silicon Electrode”, 1999 IEEE Workshop on Charged Couple Devices and Advance Image Sensors, Jun. 10–12, 1999. See also U.S. Pat. No. 6,369,413 issued to Hynecek and assigned to Isetex.